Staff AMS Verification Engineer

Short Summary

Staff AMS Verification Engineer with Renesas Electronics. Position Overview We are looking for an experienced Staff AMS Verification Engineer to lead and execute verification of complex Analog/Mixed-Signal (AMS) PMIC (Power Management IC) designs. The role involves developing verification strategies, testbenches, methodologies, and automation for block-level and top-level PMIC verification. The ideal candidate will have…

Key Details

• Position / opportunity: Staff AMS Verification Engineer
• Organization: Renesas Electronics
• Country / coverage: India
• Location: Bengaluru, KA, India
• Work arrangement: On-site
• Opportunity type: Jobs
• Sector: Information Technology
• Compensation: Not specified
• Duration: Not specified
• Start date: 2026-08-19
• Application deadline: Not specified

Description

Position Overview We are looking for an experienced Staff AMS Verification Engineer to lead and execute verification of complex Analog/Mixed-Signal (AMS) PMIC (Power Management IC) designs. The role involves developing verification strategies, testbenches, methodologies, and automation for block-level and top-level PMIC verification. The ideal candidate will have strong expertise in analog/mixed-signal verification, SystemVerilog/UVM, real-number modeling (RNM), SPICE simulations, and power-management circuits, with the ability to work closely with analog design, digital design, modeling, and product engineering teams. Key Responsibilities Own the AMS verification strategy for PMIC blocks and full-chip/top-level designs. Define verification plans, coverage goals, test scenarios, and verification methodologies. Develop and maintain SystemVerilog/UVM-based verification environments for mixed-signal designs. Develop and use Real Number Models (RNM), behavioral models, and mixed-signal abstractions for efficient verification. Perform AMS/DMS simulations for functional and corner-case verification. Verify PMIC functionality including: LDOs and voltage regulators, Buck/boost converters, Bandgap references,Oscillators, Charge pumps, Power-on-reset (POR), Brownout detection, Voltage/current monitoring, ADC/DAC interfaces, Power sequencing and state machines ,Protection features(OVP, UVP, OCP, OTP, and short-circuit protection) Develop verification models for analog blocks and their interaction with digital control logic. Debug failures across analog, digital, RTL, behavioral models, and testbench environments. Collaborate closely with analog designers and digital designers, review design specifications and identify verification gaps, corner cases, and potential risks. Mentor junior and senior verification engineers and provide technical leadership. Drive improvements in verification methodology, simulation efficiency, automation, and coverage closure. Contribute to project schedules, technical reviews, sign-off criteria, and verification documentation. Required Qualifications Bachelor's or Master's degree in Electrical/Electronics Engineering, Microelectronics, or a related field. Typically 8+ years of experience in semiconductor verification, with significant experience in AMS verification. Strong understanding of analog and mixed-signal circuit fundamentals. Hands-on experience with PMIC architecture and power-management circuits. Strong programming/scripting skills in one or more of: SystemVerilog Python Perl Tcl C/C++ Strong experience with SystemVerilog/UVM and constrained-random verification. Experience with AMS simulation and SPICE-based verification. Experience with Real Number Modeling (RNM) and/or behavioral modeling. Experience with industry-standard EDA tools such as Cadence, Synopsys, or Siemens EDA simulation and verification environments. Strong debugging and problem-solving skills. Experience defining verification plans and driving coverage closure and sign-off. Preferred Qualifications Experience verifying automotive, consumer, mobile, industrial, or server PMICs. Knowledge of power-management architectures, including switching regulators and linear regulators. Experience with AMS assertions, SVA, and functional safety concepts. Knowledge of formal verification or hybrid analog/digital verification methodologies. Experience developing reusable AMS verification IP and verification frameworks. Experience with silicon bring-up, characterization, or correlation between simulation and silicon measurements. Leadership Expectations – Staff Level Act as a technical owner for AMS verification methodology and execution. Influence architecture and design decisions by identifying verification risks early. Establish reusable verification frameworks and best practices across projects. Lead complex debug involving interactions between analog and digital domains. Mentor engineers and raise the overall technical capability of the verification team. Drive technical decisions across cross-functional teams and communicate effectively with senior engineering leadership. Proactively identify opportunities to improve verification…

Responsibilities

• Position Overview We are looking for an experienced Staff AMS Verification Engineer to lead and execute verification of complex Analog/Mixed-Signal (AMS) PMIC (Power Management IC) designs.
• The role involves developing verification strategies, testbenches, methodologies, and automation for block-level and top-level PMIC verification.
• The ideal candidate will have strong expertise in analog/mixed-signal verification, SystemVerilog/UVM, real-number modeling (RNM), SPICE simulations, and power-management circuits, with the ability to work closely with analog design, digital design…
• Key Responsibilities Own the AMS verification strategy for PMIC blocks and full-chip/top-level designs.
• Define verification plans, coverage goals, test scenarios, and verification methodologies.
• Develop and maintain SystemVerilog/UVM-based verification environments for mixed-signal designs.

Requirements / Eligibility

• Bachelor's or Master's degree in Electrical/Electronics Engineering, Microelectronics, or a related field.
• Typically 8+ years of experience in semiconductor verification, with significant experience in AMS verification.
• Strong understanding of analog and mixed-signal circuit fundamentals.
• Hands-on experience with PMIC architecture and power-management circuits.
• Strong programming/scripting skills in one or more of: SystemVerilog Python Perl Tcl C/C++ Strong experience with SystemVerilog/UVM and constrained-random verification.

How To Apply

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