Senior Staff Product Engineer – Power / Analog

Short Summary

Senior Staff Product Engineer – Power / Analog with Renesas Electronics. The role This is a product engineering role with technical program ownership. You are the single point of accountability for power/analog products from concept through first silicon, characterization, qualification, production release and sustaining — working across design, package, test, operations, foundry and OSAT teams to get it there. It is not a…

Key Details

• Position / opportunity: Senior Staff Product Engineer – Power / Analog
• Organization: Renesas Electronics
• Country / coverage: India
• Location: Bengaluru, KA, India
• Work arrangement: On-site
• Opportunity type: Jobs
• Sector: Information Technology
• Compensation: Not specified
• Duration: Not specified
• Start date: 2026-09-22
• Application deadline: Not specified

Description

The role This is a product engineering role with technical program ownership. You are the single point of accountability for power/analog products from concept through first silicon, characterization, qualification, production release and sustaining — working across design, package, test, operations, foundry and OSAT teams to get it there. It is not a yield-analysis role. Yield and outgoing quality are yours, but so are testability and trim strategy before tape-out, package and thermal selection, the NPI schedule, and the cross-functional risk register. If it stands between silicon and shipping product, you own it. Key responsibilities NPI and design-phase readiness Represent product, test and package requirements in design reviews — test access to analog nodes, trim and OTP strategy, diagnostic and self-test coverage, and the multi-variant bond-out plan where one die serves several products. Own package and thermal selection and the package development and qualification plan with the package team and OSAT — power dissipation, junction-to-ambient and junction-to-case targets, exposed-pad and board-level reliability considerations. Own the NPI schedule, milestone gates and cross-functional risk register from concept through production release. Own product cost — die size and yield entitlement, test time, package, and the unit-cost roadmap across the product life. Qualification and release Own qualification planning and execution in accordance with applicable JEDEC and AEC-Q100 requirements, including the stress set appropriate to power devices — HTOL, power/temperature cycling, and package-level reliability. Prepare product-release documentation , datasheet parameter tables and compliance evidence, including PPAP evidence where applicable. Support the functional-safety work products — ensuring production screens and characterization data substantiate the FMEDA and safety manual claims. Production and sustaining Monitor production data and apply statistical analysis to identify and correct yield, quality and test-time deficiencies; drive yield improvement. Optimise PAT, SYL, SBL, SPC and disposition limits to protect outgoing quality. Work with planning, manufacturing, subcontractors and operations to remove material-flow obstacles and recover schedule gaps. Create and maintain product BOMs and lifecycle data in PLM systems such as Agile; support fab transfer, process change and BOM change activities. Support customer-return and RMA investigations by reproducing failures and assessing production test coverage — including electrical overstress and field-stress modes typical of power devices. Own the product through end of life , including last-time-buy and discontinuation planning. Technical leadership Provide technical direction and sign off reviews across design, product engineering, operations, suppliers and OSAT teams, including DFX topics. Act as the escalation point for product-level technical decisions and drive risk resolution to closure. Influence cross-functional teams without direct authority and communicate clearly to stakeholders at every level. Mentor product and test engineers and raise the standard of product engineering practice across programs. Bachelor's degree in electronics, electrical, materials or physics engineering. Advanced degree welcome. 10+ years of semiconductor experience spanning product engineering, NPI, manufacturing and test — or 8+ with an advanced degree. Concept-to-mass-production ownership of at least one product is essential. Power or analog product experience — High-voltage or high-current devices; drivers, regulators, power management or similar. This is the core requirement. Strong grasp of analog and power device behaviour — driver stages, regulators, references and protection circuits — and how they move over process, voltage and temperature. Practical understanding of wafer fabrication, assembly, test, qualification and production-release flows. Experience managing engineering wafer starts, prototype builds, customer samples, inventory and product BOMs. . Familiarity with JEDEC and AEC-Q100 qualification standards , qualification hardware and software, and failure analysis…

Responsibilities

• The role This is a product engineering role with technical program ownership.
• You are the single point of accountability for power/analog products from concept through first silicon, characterization, qualification, production release and sustaining — working across design, package, test, operations, foundry and OSAT teams to get it…
• Yield and outgoing quality are yours, but so are testability and trim strategy before tape-out, package and thermal selection, the NPI schedule, and the cross-functional risk register.
• If it stands between silicon and shipping product, you own it.
• Key responsibilities NPI and design-phase readiness Represent product, test and package requirements in design reviews — test access to analog nodes, trim and OTP strategy, diagnostic and self-test coverage, and the multi-variant bond-out plan where one…
• Own package and thermal selection and the package development and qualification plan with the package team and OSAT — power dissipation, junction-to-ambient and junction-to-case targets, exposed-pad and board-level reliability considerations.

Requirements / Eligibility

• , production release and sustaining — working across design, package, test, operations, foundry and OSAT teams to get it there.
• Yield and outgoing quality are yours, but so are testability and trim strategy before tape-out, package and thermal selection, the NPI schedule, and the cross-functional risk register.
• If it stands between silicon and shipping product, you own it.
• Key responsibilities NPI and design-phase readiness Represent product, test and package requirements in design reviews — test access to analog nodes, trim and OTP strategy, diagnostic and self-test coverage, and the multi-variant bond-out plan where one…
• Own package and thermal selection and the package development and qualification plan with the package team and OSAT — power dissipation, junction-to-ambient and junction-to-case targets, exposed-pad and board-level reliability considerations.

How To Apply

Use the Apply now button and follow the instructions on the application page.