Job

Senior Principal RFIC Design Engineer

Western Digital United States

Deadline: Not specified

Short Summary

Senior Principal RFIC Design Engineer with Western Digital. ESSENTIAL DUTIES AND RESPONSIBILITIES: Designer will be responsible for the design of high performance RF and analog circuit blocks. Responsibilities include transistor level, block level and module level circuit architecture, design, simulation, optimization, layout supervision, layout verification, preparation of test plan for the testing team, reliability and…

Key Details

  • Position / opportunity: Senior Principal RFIC Design Engineer
  • Organization: Western Digital
  • Country / coverage: United States
  • Location: San Jose, CA, United States
  • Work arrangement: On-site
  • Opportunity type: Jobs
  • Sector: Health
  • Compensation: Not specified
  • Duration: Not specified
  • Start date: 2026-08-12
  • Application deadline: Not specified

Description

ESSENTIAL DUTIES AND RESPONSIBILITIES: Designer will be responsible for the design of high performance RF and analog circuit blocks. Responsibilities include transistor level, block level and module level circuit architecture, design, simulation, optimization, layout supervision, layout verification, preparation of test plan for the testing team, reliability and yield assessment and modeling, simulation to bench and bench to test correlation, bench evaluation both at silicon level and at applications level, and documentation. Job responsibilities require ability to communicate at all levels and with cross functional groups. Candidate must have good verbal and written communications skills and demonstrated track record of circuit innovation, must be a team player, be adaptable, and accept constructive feedback. REQUIRED: Must have hands-on design and development experience in RF and analog integrated circuit Must have experience in at least one preferably multiple area of full CMOS circuit design and development in: Baseband amplifiers, low noise RF amplifiers, wide bandwidth amplifiers Mixers, up-converters, down-converters High speed drivers and receivers, CDR circuits, equalizers Power amplifiers Must have experience in 40nm and below CMOS technology Must have a demonstrable track record of successful design releases and mass production Must have thorough knowledge of industry standard EDA tools (Cadence, Mentor, Siemens, Ansys etc.) Experience with RF and high performance analog block layout such as LNA, mixer, analog to digital converters, references, digital to analog converters etc. Experience with floor planning, block level routing and top level chip routing Knowledge of high performance analog layout considerations such as matching, EM-IR and SOA and mitigation techniques Experience working with distributed design teams a plus Must possess strong written and verbal communication skills BS, MS or PhD with relevant experience Location: San Jose, CA OR Irvine, CA WD is committed to providing equal opportunities to all applicants and employees and will not discriminate against any applicant or employee based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a person’s gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person’s assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the " Know Your Rights: Workplace Discrimination is Illegal ” poster. Our pay transparency policy is available here . WD thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. WD is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at jobs.accommodations@wdc.com to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. Based on our experience, we anticipate that the…

Responsibilities

  • ESSENTIAL DUTIES AND RESPONSIBILITIES: Designer will be responsible for the design of high performance RF and analog circuit blocks.
  • Responsibilities include transistor level, block level and module level circuit architecture, design, simulation, optimization, layout supervision, layout verification, preparation of test plan for the testing team, reliability and yield assessment and…
  • Job responsibilities require ability to communicate at all levels and with cross functional groups.
  • Candidate must have good verbal and written communications skills and demonstrated track record of circuit innovation, must be a team player, be adaptable, and accept constructive feedback.
  • REQUIRED: Must have hands-on design and development experience in RF and analog integrated circuit Must have experience in at least one preferably multiple area of full CMOS circuit design and development in: Baseband amplifiers, low noise RF amplifiers…
  • Experience with floor planning, block level routing and top level chip routing Knowledge of high performance analog layout considerations such as matching, EM-IR and SOA and mitigation techniques Experience working with distributed design teams a plus Must…

Requirements / Eligibility

  • r identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person’s assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic…
  • We also prohibit harassment of any individual on any of the characteristics listed above.
  • Our non-discrimination policy applies to all aspects of employment.
  • We comply with the laws and regulations set forth in the " Know Your Rights: Workplace Discrimination is Illegal ” poster.

How To Apply

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