Principal Engineer/Manager – Design Verification

Short Summary

Principal Engineer/Manager – Design Verification with Renesas Electronics. We are seeking an experienced and highly motivated Principal Engineer/Manager, Design Verification to lead a team responsible for functional verification of complex digital IPs, subsystems, and SoC solutions. The ideal candidate will have deep expertise in verification methodologies, strong people leadership skills, and a proven track record of…

Key Details

• Position / opportunity: Principal Engineer/Manager – Design Verification
• Organization: Renesas Electronics
• Country / coverage: India
• Location: Bengaluru, KA, India
• Work arrangement: On-site
• Opportunity type: Jobs
• Sector: Information Technology
• Compensation: Not specified
• Duration: Not specified
• Start date: 2026-09-07
• Application deadline: Not specified

Description

We are seeking an experienced and highly motivated Principal Engineer/Manager, Design Verification to lead a team responsible for functional verification of complex digital IPs, subsystems, and SoC solutions. The ideal candidate will have deep expertise in verification methodologies, strong people leadership skills, and a proven track record of delivering high-quality silicon products on schedule. This role requires close collaboration with architecture, design, firmware, emulation, validation, and program management teams to drive verification excellence and achieve first-silicon success. Key Responsibilities Own verification strategy, planning, execution, and sign-off for complex SoCs and SoC Subsystems. Define comprehensive verification plans aligned with architectural specifications and product requirements. Drive adoption of industry-standard verification methodologies such as UVM, SystemVerilog, Assertions, Coverage-Driven Verification, Formal Verification, and Emulation. Establish verification metrics, coverage goals, and quality benchmarks to ensure robust product delivery. Review verification architectures, testbench frameworks, reusable components, and coverage models. Lead root cause analysis and resolution of critical functional issues. Team Leadership Build, mentor, and retain a high-performing verification team. Manage team goals, performance reviews, career development, and succession planning. Foster a culture of technical excellence, accountability, collaboration, and innovation. Drive recruitment and onboarding of verification engineers across experience levels. Partner with Design, Architecture, Validation, DFT, Firmware, and Program Management teams throughout the product lifecycle. Track project schedules, risks, dependencies, and resource planning. Provide regular status updates to senior leadership on project execution and quality metrics. Ensure timely achievement of verification milestones and tape-out readiness. Process & Quality Improvement Define and implement best practices for verification productivity and reuse. Drive automation initiatives to improve efficiency and reduce turnaround time. Improve regression methodologies, debug workflows, and coverage closure processes. Promote continuous improvement through post-silicon feedback and lessons learned. Bachelor's or master's degree in Electronics Engineering, Electrical Engineering. 15+ years of experience in Design Verification with at least 3-5 years in technical leadership or people management roles. Strong expertise in: System Verilog UVM methodology Functional coverage and assertions Verification planning and execution Simulation, emulation, and formal verification techniques Experience verifying complex digital designs, IPs, subsystems, or SoCs. Strong debugging skills and understanding of microarchitecture. Experience with scripting languages such as Python, Perl, Tcl, or Shell. Proven experience driving projects from specification through silicon validation. Preferred Qualifications Experience in Automotive SoCs and MCUs. Familiarity with safety standards such as ISO26262. Knowledge of mixed-signal verification methodologies. Experience with FPGA prototyping and emulation platforms. Experience managing geographically distributed teams. Strong stakeholder management and communication skills. Key Competencies Proven technical expertise in Verification People Leadership Strategic Thinking Tracking of deliverables and guiding junior members of the team Problem Solving Cross-Functional Collaboration Decision Making Talent Development Continuous Improvement Success Measures Achievement of verification coverage and quality targets. On-time project execution and tape-out readiness. Reduction in escaped bugs and post-silicon issues. Team engagement, capability development, and retention. Increased verification reuse, automation, and productivity. This role offers an opportunity to lead cutting-edge verification programs and influence the delivery of next-generation semiconductor solutions while building and developing a world-class verification organization. Renesas is an embedded semiconductor solution provider driven by its Purpose, To…

Responsibilities

• We are seeking an experienced and highly motivated Principal Engineer/Manager, Design Verification to lead a team responsible for functional verification of complex digital IPs, subsystems, and SoC solutions.
• The ideal candidate will have deep expertise in verification methodologies, strong people leadership skills, and a proven track record of delivering high-quality silicon products on schedule.
• This role requires close collaboration with architecture, design, firmware, emulation, validation, and program management teams to drive verification excellence and achieve first-silicon success.
• Key Responsibilities Own verification strategy, planning, execution, and sign-off for complex SoCs and SoC Subsystems.
• Define comprehensive verification plans aligned with architectural specifications and product requirements.
• Drive adoption of industry-standard verification methodologies such as UVM, SystemVerilog, Assertions, Coverage-Driven Verification, Formal Verification, and Emulation.

Requirements / Eligibility

• Drive adoption of industry-standard verification methodologies such as UVM, SystemVerilog, Assertions, Coverage-Driven Verification, Formal Verification, and Emulation.
• Establish verification metrics, coverage goals, and quality benchmarks to ensure robust product delivery.
• Review verification architectures, testbench frameworks, reusable components, and coverage models.
• Lead root cause analysis and resolution of critical functional issues.
• Team Leadership Build, mentor, and retain a high-performing verification team.

How To Apply

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